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IDT74FCT2574AT/CT FAST CMOS OCTAL D REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS OCTAL D REGISTER (3-STATE)
IDT74FCT2574AT/CT
FEATURES:
* * * * * * * *
A and C grades Low input and output leakage 1A (max.) CMOS power levels True TTL input and output compatibility: - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) Resistor outputs (-15mA IOH, 12mA IOL) Meets or exceeds JEDEC standard 18 specifications Reduced system switching noise Available in SOIC, QSOP, and TSSOP packages
DESCRIPTION:
The FCT2574T is an 8-bit register built using an advanced dual metal CMOS technology. These registers consist of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) input is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. Input data meeting the set-up and hold time requirements of the D inputs is transferred to the Q outputs on the low-to-high transition of the clock input. The FCT2574T has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot and controlled output fall times-reducing the need for external series terminating resistors. FCT2574T parts are plug-in replacements for FCT574T parts.
FUNCTIONAL BLOCK DIAGRAM
D0 CP CP D Q CP
D1
D2
D3
D4
D5
D6
D7
D Q
CP
D Q
CP
D Q
CP
D Q
CP
D Q
CP
D Q
CP
D Q
OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
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JUNE 2002
DSC-5495/2
(c) 2002 Integrated Device Technology, Inc.
IDT74FCT2574AT/CT FAST CMOS OCTAL D REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM(2) VTERM(3) TSTG IOUT Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max -0.5 to +7 -0.5 to VCC+0.5 -65 to +150 -60 to +120 Unit V V C mA
OE D0 D1 D2 D3 D4 D5 D6 D7 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 CP
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Inputs and Vcc terminals only. 3. Output and I/O terminals only.
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit pF pF
NOTE: 1. This parameter is measured at characterization but not tested.
SOIC/ QSOP/ TSSOP TOP VIEW
PIN DESCRIPTION
Pin Names Dx CP Qx Qx OE Description D flip-flop data inputs Clock Pulse for the register. Enters data on LOW-toHIGH transition. 3-State Outputs (TRUE) 3-State Outputs (INVERTED) Active LOW 3-State Output Enable Input
FUNCTION TABLE(1)
Function High-Z Load Register OE H H L L H H Inputs CP L H Dx X X L H L H Outputs Qx Z Z L H Z Z Internal Qx NC NC H L H L
NOTE: 1. H = HIGH Voltage Level X = Don't Care L = LOW Voltage Level Z = High Impedance NC = No Change = LOW-to-HIGH transition
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IDT74FCT2574AT/CT FAST CMOS OCTAL D REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 5.0V 5%
Symbol VIH VIL IIH IIL IOZH IOZL II VIK VH ICC Parameter Input HIGH Level Input LOW Level Input HIGH Current(4) Input LOW Current(4) High Impedance Output Current (3-State output pins)(4) Input HIGH Current(4) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = Max., VI = VCC (Max.) VCC = Min, IIN = -18mA -- VCC = Max., VIN = GND or VCC Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max VI = 2.7V VI = 0.5V VO = 2.7V VO = 0.5V Min. 2 -- -- -- -- -- -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -0.7 200 0.01 Max. -- 0.8 1 1 1 1 1 -1.2 -- 1 A V mV mA Unit V V A A A
OUTPUT DRIVE CHARACTERISTICS
Symbol IODL IODH VOH VOL Parameter Output LOW Current Output HIGH Current Output HIGH Voltage Output LOW Voltage Test Conditions(1) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3) VCC = Min IOH = -15mA VIN = VIH or VIL VCC = Min IOL = 12mA VIN = VIH or VIL Min. 16 -16 2.4 -- Typ.(2) 48 -48 3.3 0.3 Max. -- -- -- 0.5 Unit mA mA V V
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. The test limit for this parameter is 5A at TA = -55C.
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IDT74FCT2574AT/CT FAST CMOS OCTAL D REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open OE = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND fi = 5MHz One Bit Toggling 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND Eight Bits Toggling fi = 2.5MHz 50% Duty Cycle VIN = VCC VIN = GND Test Conditions(1) Min. -- -- Typ.(2) 0.5 0.06 Max. 2 0.12 Unit mA mA/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND
--
0.6
2.2
mA
VIN = 3.4V VIN = GND
--
1.1
4.2
VIN = VCC VIN = GND
--
1.5
4(5)
VIN = 3.4V VIN = GND
--
3.8
13(5)
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2+ fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Output Frequency Ni = Number of Outputs at fi All currents are in milliamps and all frequencies are in megahertz.
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IDT74FCT2574AT/CT FAST CMOS OCTAL D REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW Parameter Propagation Delay CP to Qx Output Enable Time Output Disable Time Set-up Time, HIGH or LOW Dx to CP Hold Time, HIGH or LOW Dx to CP CP Pulse Width HIGH or LOW(3) Condition(1) CL = 50pF RL = 500 FCT2574AT Min.(2) Max. 2 6.5 1.5 1.5 2 1.5 5 6.5 5.5 -- -- -- FCT2574CT Min.(2) Max. 2 5.2 1.5 1.5 2 1.5 5 5.5 5 -- -- -- Unit ns ns ns ns ns ns
NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not tested.
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IDT74FCT2574AT/CT FAST CMOS OCTAL D REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V CC 7.0V 500 VIN Pulse G enerator D.U.T. 50pF R
T
SWITCH POSITION
Test Switch Closed Open Open Drain Disable Low Enable Low All Other Tests
V OU T
500 C
L
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
DATA INPUT tSU TIMING INPUT ASYNCHRO NOUS CONTROL PRESET CLEAR ETC. SYNCHRON OUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tREM tH
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
Octal link
LOW -HIGH-LOW PULSE tW HIGH-LOW -HIG H PULSE
Octal link
1.5V
1.5V
tSU
tH
Pulse Width
Set-Up, Hold, and Release Times
ENABLE SAM E PHASE INPUT TRANSITION tPLH O UTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V
Octal link
DISABLE 3V
CONTROL INPUT tPZL OUTPUT NORMALLY LOW SW ITCH CLO SED tPZH OUTPUT NORMALLY HIGH SW ITCH OPEN 3.5V 1.5V 0.3V tPHZ 0.3V 1.5V 0V tPLZ
1.5V 0V 3.5V VOL VOH
0V
Octal link
Propagation Delay
Enable and Disable Times
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.
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IDT74FCT2574AT/CT FAST CMOS OCTAL D REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XX FCT XXXX Device Type Temp. Range X Package SO Q PG Small Outline IC Quarter-size Small Outline Package Thin Shrink Small Outline Package
2574AT 2574CT
Fast CMOS Octal D Register (3-State)
74
- 40C to +85C
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for Tech Support: logichelp@idt.com (408) 654-6459
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